Parallel Computing on Stampede - May 4 and 5, 2015
9:00 a.m. to 5 p.m. CT, both days
J.J. Pickle Research Campus
10100 Burnet Rd
The Stampede supercomputer at the Texas Advanced Computing Center went into production in January 2013 and provides more than 100,000 computational cores. It provides nearly 10 petaflops (PF) of peak performance, with 2PF attributed to the Intel Xeon E5 "Sandy Bridge" processors and an additional 7+ PF attributed to the Intel Xeon Phi coprocessors.
During the two-day training sessions, we will provide an overview of the Stampede architecture, describe the Stampede user environment, provide an introduction to parallel computing (MPI, OpenMP, Hybrid Programming), discuss program optimization techniques, and present an overview of the profiling and debugging tools that are available on Stampede. Participants in the training will be provided accounts to access Stampede and do the hands-on exercises.
The detailed agenda for this two-day training is as follows :
|Parallel Computing Day 1|
|Welcome and Introductory Remarks||9:00 AM|
|TACC Systems Review||9:15 AM|
|Introduction to Parallel Computing||10:30 AM|
|Linux User Environment||12:30 PM|
|Lab (Linux User Environment)||1:30 PM|
|MPI Programming||2:15 PM|
|Lab (MPI Programming)||3:45 PM|
|Parallel Computing Day 2|
|OpenMP Programming||9:00 AM|
|Lab (OpenMP Programming)||10:00 AM|
|Hybrid Programming||10:45 AM|
|Optimization & Scalability||1:00 PM|
|Lab (Optimization & Scalability)||2:00 PM|
Registration is closed.