SC14 Training

This class will be an in person only class.  There will be no webcast.

Participants must bring their own laptop to take part in class hands-on exercises.

This class is intended for intermediate to advanced users of Stampede.  Attendees are expected to be able to program using MPI and OpenMP.

The Innovative Technology component of the XSEDE Stampede supercomputer at TACC provides access to 8 PetaFlops of computing power in the form of the new Intel Xeon Phi Coprocessor, also known as MIC. While the MIC is x86 based, hosts its own Linux OS, and is capable of running most user codes with little porting effort, the MIC architecture has significant features that are different from that of present x86 CPUs, and optimal performance requires an understanding of the possible execution models and basic details of the architecture. This workshop is designed to introduce Stampede users to the MIC architecture in a practical manner. Multiple lectures and hands-on exercises will be used to get the user acquainted with the MIC platform and explore the different execution modes as well as parallelization and optimization through example testing and reports.  Users are also welcome to bring their own codes to compile for MIC.

The workshop will be divided in four sections: Introduction to the MIC architecture; native execution and optimization; offload execution; and symmetric execution. In each section the users will spend half the time doing guided hands-on exercises.

SC14 MIC Introduction and Lab PDF

SC14 MIC Native PDF

SC14 MIC Native Lab PDF

SC14 MIC Offload PDF

SC14 MIC Offload Lab PDF

SC14 MIC Offload Demos PDF

SC14 MIC Symmetric PDF

SC14 MIC Symmetric Lab PDF